วันศุกร์ที่ 28 สิงหาคม พ.ศ. 2552

Basic Concept of HDLs – Verilog and VHDL

With most digital design exceeding thousands of gates, the schematic design
approach has given way to more abstract descriptions of digital design. This more
abstract design methodolgy is based on hardware description language.
Contemporary HDL languages started out as simulation languages. Very high
speed integrated circuit hardware description language (VHDL) started out as a
U.S. Department of Defense initiative. It was primarily meant to integrate and
correlate simulation results of digitial circuits from various defense vendors.
Similarly, Verilog evolved as a tool for verifying logic in the digital domain. Both
VHDL and Verilog are defined by IEEE standards. Verilog has been through
revisions to cover deficiencies. Verilog is defined by the IEEE standard 1364. The
IEEE 1364-1995 and IEEE 1364-2001 refer to Verilog-95 and Verilog-2001.
Today with the help of EDA synthesis tools, code written in HDL can be
synthesized into target specific architectures. Both HDLs can be understood by the
way their design approach mirrors the use of discrete chips on a PCB.
Verilog divides its constructs into four levels of abstraction. The first level of
abstraction is the switch level, where individual MOS transistor-based switches are
interconnected to form gates and flip-flops. The second level of abstraction is the
gate level, where one can instantiate basic gates and interconnect them to form a
digital system. Both the switch level and gate level constructs are rarely used in
designing high density digital logic. The third level of abstraction, the data flow
provides interconnection of different combinational logic circuits using a single
statement. Behavioural modeling supports the most abstract level of construct
using HDL. Here the designer can code digital design in the format of a high-level
software language. For Verilog, behavioural constructs resemble the C
programming language constructs. Even though each abstraction layer defines
different keywords, signals between different abstraction layers can be
interconnected.

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